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HEF4052 Datasheet PDF

Part Series:
HEF4052 Series
Category:
Interface ICs
Description:
IC MUX/DEMUX DUAL 4X1 16SOIC
Updated Time: 2023/01/13 02:18:03 (UTC + 8)

HEF4052 Datasheet PDF Interface ICs

22 Pages
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HEF4052BT,653 - Nexperia Specifications

TYPE
DESCRIPTION
Mounting Style
Surface Mount
Number of Pins
16 Pin
Case/Package
SOIC-16
Number of Outputs
2 Output
Supply Current
20 µA
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HEF4052BT,653 - Nexperia Function Overview

The HEF4052BT is a 4-channel dual Analog Multiplexer/Demultiplexer with common channel select logic. Each multiplexer/demultiplexer has four independent inputs/outputs (nY0 to nY3) and a common input/output (nZ). The common channel select logic includes two select inputs (S1 and S2) and an active low enable input (E\\). Both multiplexers/demultiplexers contain four bidirectional analog switches, each with one side connected to an independent input/output (nY0 to nY3) and the other side connected to a common input/output (nZ). With E\ low, one of the four switches is selected (low-impedance on-state) by S1 and S2. With E\ high, all switches are in the high-impedance OFF-state, independent of S1 and S2. If break before make is needed, then it is necessary to use the enable input. VDD and VSS are the supply voltage connections for the digital control inputs. The VDD to VSS range is 3 to 15V. The analog inputs/outputs can swing between VDD as a positive limit and VEE as a negative limit.
Fully static operation
Standardized symmetrical output characteristics
Complies with JEDEC standard JESD 13-B
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