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IR2103 Datasheet PDF

Part Series:
IR2103 Series
Category:
FET Drivers
Description:
Half Bridge Driver, Separate High and Low Side Inputs, Inverting Low Side Input, Fixed 520ns Deadtime in a 8Pin DIP package
Updated Time: 2023/01/13 01:29:48 (UTC + 8)

IR2103 FET Drivers Datasheet PDF

IR2103 Datasheet PDF FET Drivers

18 Pages
International Rectifier
Driver 600V 0.36A 2Out Hi/Lo Side Half Brdg Inv/Non-Inv 8Pin PDIP Tube
18 Pages
International Rectifier
Half Bridge Driver, Separate High and Low Side Inputs, Inverting Low Side Input, Fixed 520ns Deadtime in a 8Pin DIP package
18 Pages
International Rectifier
Driver 600V 0.36A 2Out Hi/Lo Side Half Brdg Inv/Non-Inv 8Pin SOIC Tube
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Infineon
Driver 600V 0.36A 2Out Hi/Lo Side Half Brdg Inv/Non-Inv 8Pin SOIC
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International Rectifier
IC DRIVER HALF BRIDGE 600V 8SOIC
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Infineon
Driver 600V 0.36A 2Out Hi/Lo Side Half Brdg Inv/Non-Inv 8Pin SOIC T/R

IR2103 - International Rectifier Specifications

TYPE
DESCRIPTION
Mounting Style
Through Hole
Number of Pins
8 Pin
Supply Voltage (DC)
20.0V (max)
Case/Package
DIP-8
Number of Outputs
2 Output
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IR2103 - International Rectifier Function Overview

Description
The IR2103(S) are high voltage, high speed power MOSFET and IGBT drivers with dependent high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts.
Features
 Floating channel designed for bootstrap operation
 Fully operational to +600V
 Tolerant to negative transient voltage
 dV/dt immune
 Gate drive supply range from 10 to 20V
 Undervoltage lockout
 3.3V, 5V and 15V logic compatible
 Cross-conduction prevention logic
 Matched propagation delay for both channels
 Internal set deadtime
 High side output in phase with HIN input
 Low side output out of phase with LIN input
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