JS28F256 Datasheet PDF

●The JS28F256M29EWLA is a 256MB asynchronous uniform block parallel NOR Flash EMBedded Memory manufactured on 65nm multilevel cell (MLC) technology. READ, ERASE and PROGRAM operations are performed using a single low-voltage supply. Upon power-up, the device defaults to read array mode. The main memory array is divided into uniform blocks that can be erased independently so that valid data can be preserved while old data is purged. PROGRAM and ERASE commands are written to the command interface of the memory. An on-chip program/erase controller simplifies the process of programming or erasing the memory by taking care of all special operations required to update the memory contents. The end of a PROGRAM or ERASE operation can be detected and any error condition can be identified. The command set required to control the device is consistent with JEDEC standards. The M29EW supports asynchronous random read and page read from all blocks of the array.

● Asynchronous random/page read

● Buffer program - 512-word program buffer

● Memory organization - uniform blocks - 128-Kbytes or 64-Kwords each

● Program/erase controller - embedded byte/word program algorithms

● Program/erase suspend and resume capability

● Read from any block during a PROGRAM SUSPEND operation

● Read or program another block during an ERASE SUSPEND operation

● BLANK CHECK operation to verify an erased block

● Unlock bypass, block erase, chip erase and write to buffer capability

● Fast buffered/batch programming

● Fast block/chip erase

● VPP/WP# pin protection - protects first or last block regardless of block protection settings

● Software protection

● Extended memory block

● Programmed or locked at the factory or by the customer

● Low power consumption - standby mode

● 100000 Minimum ERASE cycles per block

● Data retention - 20 years typical