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SN65176 Datasheet PDF

Part Series:
SN65176 Series
Category:
Interface ICs
Description:
RS-485 Differential Bus Transceiver Single Transmitter/Receiver RS-422/RS-485 8Pin PDIP Tube
Updated Time: 2023/01/13 02:27:51 (UTC + 8)

SN65176 Datasheet PDF Interface ICs

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SN65176BP - TI Specifications

TYPE
DESCRIPTION
Mounting Style
Through Hole
Number of Pins
8 Pin
Supply Voltage (DC)
5.00 V
Case/Package
PDIP-8
Supply Current
70 mA
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SN65176BP - TI Function Overview

The SN65176BP is a Differential Bus Transceiver designed for bidirectional data communication on multipoint bus transmission lines. It is designed for balanced transmission lines and meets ANSI standards TIA/EIA-422-B and TIA/EIA-485-A and ITU recommendations V.11 and X.27. The SN65176B device combines a 3-state differential line driver and a differential input line receiver, both of which operate from a single 5V power supply. The driver and receiver have active-high and active-low enables, respectively, that can be connected together externally to function as a direction control. The driver differential outputs and the receiver differential inputs are connected internally to form differential input/output (I/O) bus ports that are designed to offer minimum loading to the bus when the driver is disabled or VCC=0. This port features wide positive and negative common-mode voltage ranges, making the device suitable for party-line applications.
3-state driver and receiver outputs
Individual driver and receiver enables
Wide positive and negative input/output bus voltage ranges
Thermal shutdown protection
Driver positive and negative current limiting
Designed for multipoint transmission on long bus lines in noisy environments
Operate from single 5V supply
±60mA Maximum driver output capability
12kR Minimum receiver input impedance
±200mV Receiver input sensitivity
50mV Typical receiver input hysteresis
150°C Operating virtual junction temperature
Device has limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
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