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TPS51100 Datasheet PDF

Part Series:
TPS51100 Series
Category:
Voltage Regulators
Description:
Single Channel LDO 3A Source/Sink DDR terminator Regulator LDO Regulator Neg/Pos -0.1V to 3.6V 3A 10Pin HVSSOP EP T/R
Updated Time: 2023/01/13 03:15:12 (UTC + 8)

TPS51100 Datasheet PDF Voltage Regulators

27 Pages
TI
Power Management IC Development Tools TPS51100-001 Eval Mod

TPS51100DGQR - TI Specifications

TYPE
DESCRIPTION
Mounting Style
Surface Mount
Number of Pins
10 Pin
Case/Package
PowerPad-MSOP-10
Number of Outputs
1 Output
Output Voltage
1.2V ~ 3.6V
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TPS51100DGQR - TI Function Overview

The TPS51100DGQR is a 3A sink and source double-data-rate (DDR) Terminator Regulator. The device maintains fast transient response, only requiring 20µF (2 x 10µF) of ceramic output capacitance. The device supports remote sensing functions and all features required to power the DDR and DDR2 VTT bus termination according to the JEDEC specification. The device also supports DDR3 VTT termination with VDDQ at 1.5V (typical). In addition, the device includes integrated sleep-state controls, placing VTT in Hi-Z in S3 (suspend to RAM) and soft-OFF for VTT and VTTREF in S5 (suspend to disk).
3A Sink and source termination regulator Includes droop compensation
1.2V Input (VLDOIN) helps reduce total power dissipation
Integrated divider tracks 0.5 VDDQSNS for VTT and VTTREF
Remote sensing (VTTSNS)
±20mV Accuracy for VTT and VTTREF
10mA Buffered reference (VTTREF)
Built-in soft-start, UVLO and OCL
Thermal shutdown
Supports JEDEC specifications
Green product and no Sb/Br
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