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CD4502 Datasheet PDF

Part Series:
CD4502 Series
Category:
Logic Gates
Description:
Buffer/Driver 6CH Inverting 3-ST CMOS 16Pin PDIP Tube
Updated Time: 2023/01/13 03:05:19 (UTC + 8)

CD4502 Datasheet PDF Logic Gates

16 Pages
TI
Buffer/Driver 6CH Inverting 3-ST CMOS 16Pin PDIP Tube
16 Pages
TI
Buffer/Driver 6CH Inverting 3-ST CMOS 16Pin SOIC Tube
16 Pages
TI
Buffer/Driver 6CH Inverting 3-ST CMOS 16Pin TSSOP T/R
16 Pages
TI
Buffer/Driver 6CH Inverting 3-ST CMOS 16Pin SOIC T/R
16 Pages
TI
Buffer/Driver 6CH Inverting 3-ST CMOS 16Pin TSSOP Tube
16 Pages
TI
CMOS Strobed Hex Inverter/Buffer with 3-State Outputs 16-TSSOP -55 to 125
16 Pages
TI
CMOS Strobed Hex Inverter/Buffer with 3-State Outputs 16-TSSOP -55 to 125
16 Pages
TI
CMOS Strobed Hex Inverter/Buffer with 3-State Outputs 16-TSSOP -55 to 125
15 Pages
TI
Buffer/Driver 6CH Inverting 3-ST CMOS 16Pin SOIC T/R
15 Pages
TI
Buffer/Driver 6CH Inverting 3-ST CMOS 16Pin CDIP Tube
15 Pages
TI
CMOS Strobed Hex Inverter/Buffer with 3-State Outputs 16-SOIC -55 to 125
15 Pages
TI
CMOS Strobed Hex Inverter/Buffer with 3-State Outputs 16-SOIC -55 to 125

CD4502BE - TI Specifications

TYPE
DESCRIPTION
Mounting Style
Through Hole
Number of Pins
16 Pin
Supply Voltage (DC)
3.00V ~ 18.0V
Case/Package
DIP-16
Number of Outputs
6 Output
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CD4502BE - TI Function Overview

The CD4502BE is a CMOS strobe Hex Inverter/Buffer with 3-state outputs. A logic 1 on the OUTPUT DISABLE input produces a high-impedance state in all six outputs. This feature permits common busing of the outputs, thus simplifying system design. A Logic 1 on the INHIBIT input switches all six outputs to logic 0 if the OUTPUT DISABLE input is a logic 0. This device is capable of driving two standard TTL loads, which is equivalent to six times the JEDEC B-series IOL standard.
Common output-disable control
Inhibit control
2 TTL-load output drive capability
100% Tested for quiescent current at 20V
5/10/15V Parametric ratings
Green product and no Sib/Br
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