●Product Details
●The AD9553 is a phase-locked loop (PLL) based clock translator designed to address the needs of passive optical networks (PON) and base stations. The device employs an integer-N PLL to accommodate the applicable frequency translation requirements. The user supplies up to two single-ended input reference signals or one differential input reference signal via the REFA and REFB inputs. The device supports holdover applications by allowing the user to connect a 25 MHz crystal resonator to the XTAL input.
●The AD9553 is pin programmable, providing a matrix of standard input/output frequency translations from a list of 15 possible input frequencies to a list of 52 possible output frequency pairs (OUT1 and OUT2). The device also has a 3-wire SPI interface, enabling the user to program custom input-to-output frequency translations.
●The AD9553 output is compatible with LVPECL, LVDS, or single-ended CMOS logic levels, although the AD9553 is implemented in a strictly CMOS process.
●The AD9553 operates over the extended industrial temperature range of −40°C to +85°C.
●Applications
● Cost effective replacement of high frequency VCXO, OCXO, and SAW resonators
● Extremely flexible frequency translation for SONET/SDH, Ethernet, Fibre Channel, DRFI/DOCSIS, and PON/EPON/GPON
● Wireless infrastructure
● Test and measurement (including handheld devices)
●### Features and Benefits
● Input frequencies from 8 kHz to 710 MHz
● Output frequencies up to 810 MHz LVPECL and LVDS (up to 200 MHz for CMOS output)
● Preset pin-programmable frequency translation ratios cover popular wireline and wireless frequency applications, including xDSL, T1/E1, BITS, SONET, and Ethernet.
● Arbitrary frequency translation ratios via SPI port
● On-chip VCO
● Accepts a crystal resonator for holdover applications
● Two single-ended (or one differential) reference input(s)
● Two output clocks (independently programmable as LVDS, LVPECL, or CMOS)
● SPI-compatible, 3-wire programming interface
● Single supply (3.3 V)
● Very low power: <450 mW (under most conditions)
● See data sheet for additional features
Part 3D Model
