● AM3517/05 Sitara Processor:
● MPU Subsystem
● 600-MHz Sitara ARM Cortex-A8 Core
● NEON SIMD Coprocessor and Vector Floating-Point (FP) Coprocessor
● Memory Interfaces:
● 166-MHz 16- and 32-Bit mDDR/DDR2 Interface with 1GB of Total Addressable Space
● Up to 83 MHz General-Purpose Memory Interface Supporting 16-Bit-Wide Multiplexed Address/DataBus
● 64KB of SRAM
● 3 Removable Media Interfaces [MMC/SD/SDIO]
● IO Voltage:
● mDDR/DDR2 IOs: 1.8V
● Other IOs: 1.8V and 3.3V
● Core Voltage: 1.2V
● Commercial and Extended Temperature Grade (operating restrictions apply)
● 16-Bit Video Input Port Capable of Capturing HD Video
● HD Resolution Display Subsystem
● Serial Communication
● High-End CAN Controller
● 10/100 Mbit Ethernet MAC
● USB OTG Subsystem with Standard DP/DM Interface [HS/FS/LS]
● Multiport USB Host Subsystem [HS/FS/LS]
● 12-Pin ULPI or 6-, 4-, or 3-Pin Serial Interface
● Four Master and Slave Multichannel Serial Port Interface(McSPI) Ports
● Five Multichannel Buffered Serial Ports (McBSPs)
● 512-Byte Transmit and Receive Buffer (McBSP1/3/4/5)
● 5-KB Transmit and Receive Buffer (McBSP2)
● SIDETONE Core Support (McBSP2 and McBSP3 Only)For Filter, Gain, and Mix Operations
● 128-Channel Transmit and Receive Mode
● Direct Interface to I2S and PCM Device and TDM Buses
● HDQ/1-Wire Interface
● 4 UARTs (One with Infrared Data Association [IrDA] and Consumer Infrared [CIR] Modes)
● 3 Master and Slave High-Speed Inter-Integrated Circuit (I2C) Controllers
● Twelve 32-bit General-Purpose Timers
● One 32-bit Watchdog Timer
● One 32-bit 32-kHz Sync Timer
● Up to 186 General-Purpose I/O (GPIO) Pins
● Display Subsystem
● Parallel Digital Output
● Up to 24-Bit RGB
● Supports Up to 2 LCD Panels
● Support for Remote Frame Buffer Interface (RFBI) LCD Panels
● Two 10-Bit Digital-to-Analog Converters (DACs) Supporting
● Composite NTSC/PAL Video
● Luma/Chroma Separate Video (S-Video)
● Rotation of 90, 180, and 270 Degrees
● Resize Images From 1/4x to 8x
● Color Space Converter
● 8-Bit Alpha Blending
● Video Processing Front End (VPFE) 16-Bit Video Input Port
● RAW Data Interface
● 75-MHz Maximum Pixel Clock
● Supports REC656/CCIR656 Standard
● Supports YCbCr422 Format (8-Bit or 16-Bit with Discrete Horizontal and Vertical Sync Signals)
● Generates Optical Black Clamping Signals
● Built-in Digital Clamping and Black Level Compensation
● 10-Bit to 8-Bit A-law Compression Hardware
● Supports up to 16K Pixels (Image Size) in Horizontal and Vertical Directions
● System Direct Memory Access (sDMA) Controller (32 Logical Channels withConfigurable Priority)
● Comprehensive Power, Reset, and Clock Management
● ARM Cortex-A8 Memory Architecture
● ARMv7 Architecture
● In-Order, Dual-Issue, Superscalar Microprocessor Core
● ARM NEON Multimedia Architecture
● Over 2x Performance of ARMv6 SIMD
● Supports Both Integer and Floating-Point SIMD
● Jazelle RCT Execution Environment Architecture
● Dynamic Branch Prediction with Branch Target Address Cache, Global History Buffer and 8-Entry Return Stack
● Embedded Trace Macrocell [ETM] Support for Noninvasive Debug
● 16KB of Instruction Cache (4-Way Set-Associative)
● 16KB of Data Cache (4-Way Set-Associative)
● 256KB of L2 Cache
Part 3D Model
