Part 3D Model

$ 0.369

CD4077BE Datasheet PDF - TI

Manufacturer:

Category:

Logic Gates

Case Package:

DIP-14

Description:

XNOR Gate 4Element 2IN CMOS 14Pin PDIP

Pictures:

3D Model

Symbol

Footprint

Pinout

Product Pictures

Documentation:

CD4077BE Datasheet (29 Pages)

Package Outline Dimension on7 Page 8 Page 10 Page 11 Page 17 Page

Part Numbering System on1 Page

CD4077BE Datasheet PDF (29 Pages)

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CD4077BE Specifications

TYPE

DESCRIPTION

Mounting Style

Through Hole

Number of Pins

14 Pin

Digital Logic Level

CMOS

Supply Voltage (DC)

3.00V ~ 18.0V

Case/Package

DIP-14

Number of Outputs

1 Output

Output Current

6.8 mA

Number of Circuits

4 Circuit

Number of Channels

4 Channel

Number of Positions

14 Position

Number of Bits

4 Bit

Propagation Delay Max (tpd)

280 ns

Voltage Nodes

5.00 V, 10.0 V, 15.0 V

Quiescent Current

20.0 nA

Number of Gates

4 Gate

Input Capacitance

5.00 pF

Output Current Drive

-1.00 mA

Number of Inputs

2 Input

Operating Temperature (Max)

125 ℃

Operating Temperature (Min)

-55 ℃

Supply Voltage

3V ~ 18V

Supply Voltage (Max)

18 V

Supply Voltage (Min)

3 V

View Datasheet >

CD4077BE Size & Package

TYPE

DESCRIPTION

Product Lifecycle Status

Active

Packaging

Tube

Size-Width

7.62 mm

Operating Temperature

-55℃ ~ 125℃

View Datasheet >

CD4077BE Environmental

CD4077BE Export Classifications

CD4077BE Function Overview

CD4077BE Documents

CD4077BE Datasheet

29 Pages / 1.21 MByte

CD4077BE Other Datasheet PDF

29 Pages / 0.44 MByte

CD4077 Documents

CD4077BE Datasheet PDF

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CD4077BPW Datasheet PDF

XNOR Gate 4Element 2IN CMOS 14Pin TSSOP Tube

CD4077BNSR Datasheet PDF

XNOR Gate 4Element 2IN CMOS 14Pin SOP T/R

CD4077BMT Datasheet PDF

XNOR Gate 4Element 2IN CMOS 14Pin SOIC T/R

CD4077BF3A Datasheet PDF

XNOR Gate 4Element 2IN CMOS 14Pin CDIP Tube

CD4077BEE4 Datasheet PDF

XNOR Gate 4Element 2IN CMOS 14Pin PDIP Tube

CD4077BF Datasheet PDF

XNOR Gate 4Element 2IN CMOS 14Pin CDIP Tube

CD4077BPWR Datasheet PDF

XNOR Gate 4Element 2IN CMOS 14Pin TSSOP T/R

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