M95128-WMN3TG/P Datasheet PDF - ST Microelectronics

●Summary description

●These electrically erasable programmable memory (EEPROM) devices are accessed by a high speed SPI-compatible bus. The memory array is organized as 16384 x 8 bits. The device is accessed by a simple serial interface that is SPI-compatible. The bus signals are C, D and Q, as shown in Table 1 and Figure 1.

●The device is selected when Chip Select (S) is taken Low. Communications with the device can be interrupted using Hold (HOLD). In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. ECOPACK® packages are Lead-free and RoHS compliant.

●Feature summary

●■ Compatible with SPI Bus Serial Interface

●  (Positive Clock SPI Modes)

●■ Single Supply Voltage:

●   – 4.5 to 5.5V for M95128

●   – 2.5 to 5.5V for M95128-W

●   – 1.8 to 5.5V for M95128-R

●■ High Speed

●   – 5MHz Clock Rate, 5ms Write Time

●■ Status Register

●■ Hardware Protection of the Status Register

●■ BYTE and PAGE WRITE (up to 64 Bytes)

●■ Self-Timed Programming Cycle

●■ Adjustable Size Read-Only EEPROM Area

●■ Enhanced ESD Protection

●■ More than 100,000 Write Cycles

●■ More than 40-Year Data Retention

●■ Packages

●   – ECOPACK® (RoHS compliant)