MC14520B Datasheet PDF - Motorola

●The MC14518B dual BCD counter and the MC14520B dual binary counter are constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each consists of two identical, independent, internally synchronous 4–stage counters. The counter stages are type D flip–flops, with interchangeable Clock and Enable lines for incrementing on either the positive–going or negative–going transition as required when cascading multiple stages. Each counter can be cleared by applying a high level on the Reset line. In addition, the MC14518B will count out of all undefined states within two clock periods. These complementary MOS up counters find primary use in multi–stage synchronous or ripple counting applications requiring low power dissipation and/or high noise immunity.

●• Diode Protection on All Inputs

●• Supply Voltage Range = 3.0 Vdc to 18 Vdc

●• Internally Synchronous for High Internal and External Speeds

●• Logic Edge–Clocked Design — Incremented on Positive Transition of Clock or Negative Transition on Enable

●• Capable of Driving Two Low–power TTL Loads or One Low–power

●   Schottky TTL Load Over the Rated Temperature Range