MC9S12XEP100CAG Datasheet PDF - NXP

●The MC9S12XEP100CAG is a 16-bit Microcontroller based on enhanced HCS12X CPU with CISC architecture operates at a maximum frequency of 50MHz. The device incorporates 1000kB internal flash, 64kB internal RAM, 4kB EEPROM, 24-channel 12-bit A/D converter and 119 general-purpose I/O pins. This device also features peripherals like two inter-integrated circuit (IIC) bus module, four multi-scalable controller area networks (MSCAN) CAN 2.0 A/B software compatible modules, eight serial communications interface (SCI) and three serial peripheral interface modules (SPI). The MC9S12XE family features an enhanced version of the performance-boosting XGATE co-processor which is programmable in C language and runs at twice the bus frequency of the S12X with an instruction set optimized for data movement, logic and bit manipulation instructions and which can service any peripheral module on the device.

● Upward compatible with MC9S12 instruction set

● Enhanced indexed addressing

● Access to large data segments independent of PPAGE

● Interrupt module (INT)

● Module mapping control (MMC)

● Debug module

● Background debug mode (BDM)

● Memory protection unit (MPU)

● Low power loop control pierce oscillator utilizing a 4MHz to 16MHz crystal

● Internally filtered, frequency modulated phase-locked-loop clock generation (IPLL)

● Clock and reset generation (CRG)

● COP watchdog

● Real time interrupt

● Clock monitor

● Fast wake up from STOP in self clock mode

● Enhanced capture timer (ECT) - 8 x 16-bit channels for input capture or output compare

● Standard timer module (TIM) - 8 x 16-bit channels for input capture or output compare

● Periodic interrupt timer (PIT)

● 8 PWM (pulse-width modulator) channels

● On-chip voltage regulator - two parallel, linear voltage regulators with bandgap reference