MCF5282CVM66 Datasheet PDF - NXP

●The MCF5282CVM66 is a 32-bit Microcontroller based on the ColdFire V2 core and integrated with Ethernet, CAN and flash. These devices offer advanced communications features, a rich peripheral set and a variety of supporting software and development tools. With its integrated 10/100 Mbps Ethernet MAC and network-ready applications software. The processor core is comprised of two separate pipelines that are decoupled by an instruction buffer. The two-stage instruction fetch pipeline (IFP) is responsible for instruction-address generation and instruction fetch. The instruction buffer is a first-in-first-out (FIFO) buffer that holds prefetched instructions awaiting execution in the operand execution pipeline (OEP). The OEP includes two pipeline stages. The first stage decodes instructions and selects operands (DSOC); the second stage (AGEX) performs instruction execution and calculates operand effective addresses, if needed.

● ColdFire V2 core delivering 76 (Dhrystone 2.1) MIPS at 80MHz running from cache/RAM

● Cache (KB) - 2KB I/D

● System debug support

● Fast Ethernet controller (FEC)

● FlexCAN 2.0B module

● 3 Universal asynchronous receive/transmitters (UARTs) with direct memory access (DMA) capability

● I2C module - fully compatible with industry-standard I2C bus

● Queued serial peripheral interface (QSPI)

● Queued analog-to-digital converter (QADC)

● Four 32-bit DMA timers

● Two 4-channel general purpose timers

● 4 Periodic interrupt timers (PITs)

● Software watchdog timer

● Phase locked loop (PLL)

● 2 Interrupt controllers

● DMA controller - four fully programmable channels

● Power-on reset (POR)

● External reset

● Software reset

● Watchdog