P82B96DP Datasheet PDF - NXP

●The P82B96DP is a dual bi-directional Bus Buffer creates a non-latching, bi-directional, logic interface between the normal IC-bus and a range of other bus configurations. It can interface IC-bus logic signals to similar buses having different voltage and current levels. It achieves this interface without any restrictions on the normal IC-bus protocols or clock speed. The IC adds minimal loading to the IC-bus node and loadings of the new bus or remote IC-bus nodes are not transmitted or transformed to the local node. Restrictions on the number of IC-bus devices in a system or the physical separation between them is virtually eliminated. Transmitting SDA and SCL signals via balanced transmission lines or with galvanic isolation (opto-coupling) is simple because separate directional Tx and Rx signals are provided. The Tx and Rx signals may be directly connected without causing latching, to provide an alternative bi-directional signal line with IC-bus properties.

● Bidirectional data transfer of I²C-bus signals

● Isolates capacitance allowing 400pF on Sx/Sy side and 4000 pF on Tx/Ty side

● Tx/Ty outputs have 60mA sink capability for driving low-impedance or high capacitive buses

● Low power supply current

● Latch-up free