PALCE22V10H-7JI/5 Datasheet PDF - Lattice Semiconductor

●GENERAL DESCRIPTION

●The PALCE22V10 provides user-programmable logic for replacing conventional SSI/MSI gates and

●flip-flops at a reduced chip count.

●The PALCE22V10Z is an advanced PAL® device built with zero-power, high-speed, electrically

●erasable CMOS technology. It provides user-programmable logic for replacing conventional zero

●power CMOS SSI/MSI gates and flip-flops at a reduced chip count.

●The PALCE22V10Z provides zero standby power and high speed. At 30 µA maximum standby

●current, the PALCE22V10Z allows battery-powered operation for an extended period.

●DISTINCTIVE CHARACTERISTICS

●◆As fast as 5-ns propagation delay and 142.8 MHz fMAX(external)

●◆Low-power EE CMOS

●◆10 macrocells programmable as registered or combinatorial, and active high or active low to match application needs

●◆Varied product term distribution allows up to 16 product terms per output for complex functions

●◆Peripheral Component Interconnect (PCI) compliant (-5/-7/-10)

●◆Global asynchronous reset and synchronous preset for initialization

●◆Power-up reset for initialization and register preload for testability

●◆Extensive third-party software and programmer support

●◆24-pin SKINNY DIP, 24-pin SOIC, and 28-pin PLCC

●◆5-ns and 7.5-ns versions utilize split leadframes for improved performance