SN74LVC16245ADLR Datasheet PDF - TI

●The SN74LVC16245ADLR is a 16-bit (dual-octal) non-inverting Bus Transceiver with 3-state outputs. This device is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements. This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control input. The output-enable input can be used to disable the device so that the buses are effectively isolated. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor and the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

● IOFF Supports live insertion, partial-power-down mode and back-drive protection

● Supports mixed-mode signal operation on all ports

● Latch-up performance exceeds 250mA per JESD 17

● Inputs accept voltages to 5.5V

● 4ns at 3.3V Propagation delay (tpd)

● <0.8V at VCC = 3.3V, TA = 25°C VOLP (output ground bounce)

● >2V at VCC = 3.3V, TA = 25°C VOHV (output VOH undershoot)

● Green product and no Sb/Br