SN74LVC1G132DBVT Datasheet PDF - TI

●The SN74LVC1G132DBVT is a single 2-input NAND Gate with Schmitt-trigger input. The device with different input threshold levels for positive-going (VT+) and negative-going (VT-) signals. This device can be triggered from the slowest of input ramps and still give clean jitter-free output signals. This device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

● 5.3ns at 3.3V Maximum TPD

● Low power consumption

● IOFF supports partial-power-down mode operation

● Latch-up performance exceeds 100mA per JESD 78

● ESD protection exceeds JESD 22