SN74LVC2G02DCTR Datasheet PDF - TI

●The SN74LVC2G02DCTR is a dual 2-input positive-NOR Gate. The device performs the Boolean function Y = (A + B)\ or Y = A\ • B\ in positive logic. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

● ±24mA Output drive at 3.3V

● <0.8V at VCC = 3.3V (typical) VOLP (Output ground bounce)

● >2V at VCC = 3.3V Typical VOHV (Output VOH undershoot)

● 10µA Maximum ICC low power consumption

● Inputs accept voltages to 5.5V

● Maximum tpd of 4.9ns at 3.3V

● Ioff supports partial-power-down mode operation

● ESD protection exceeds JESD 22

● Latch-up performance exceeds 100mA per JESD 78, Class II