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XC95144XL-7TQG100I Datasheet PDF - Xilinx

Manufacturer:

Xilinx

Category:

CPLDs

Case Package:

TQFP-100

Description:

CPLD XC9500 Family 3.2K Gates 144 Macro Cells 125MHz 0.35um, CMOS Technology 3.3V 100Pin TQFP

Pictures:

3D Model

Symbol

Footprint

Pinout

Product Pictures

Documentation:

XC95144XL-7TQG100I Datasheet (12 Pages)XC95144XL-7TQG100I Programming Manual (18 Pages)

XC95144XL-7TQG100I Datasheet PDF (12 Pages)

View Datasheet

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XC95144XL-7TQG100I Specifications

TYPE

DESCRIPTION

Mounting Style

Surface Mount

Frequency

125 MHz

Number of Pins

100 Pin

Case/Package

TQFP-100

Number of Positions

100 Position

Number of Inputs and Outputs

81 Input

Operating Temperature (Max)

85 ℃

Operating Temperature (Min)

-40 ℃

Supply Voltage

3.3 V

Supply Voltage (Max)

3.6 V

Supply Voltage (Min)

3 V

View Datasheet >

XC95144XL-7TQG100I Size & Package

TYPE

DESCRIPTION

Product Lifecycle Status

Active

Packaging

Tray

Operating Temperature

-40℃ ~ 85℃ (TA)

View Datasheet >

XC95144XL-7TQG100I Environmental

XC95144XL-7TQG100I Documents

XC95144XL-7TQG100I Datasheet

Xilinx

12 Pages / 0.2 MByte

XC95144XL-7TQG100I Programming Manual

Xilinx

18 Pages / 0.28 MByte

XC95144XL-7TQG100I Other Datasheet PDF

Xilinx

14 Pages / 0.21 MByte

XC95144XL-7TQG100I Drawing Diagrams

Xilinx

1 Pages / 0.14 MByte

XC95144XL-7TQG100I Product Catalog

Xilinx

10 Pages / 0.09 MByte

XC95144XL7TQG100 Documents

XC95144XL-7TQG100C Datasheet PDF

Xilinx

CPLD XC9500 Family 3.2K Gates 144 Macro Cells 125MHz 0.35um, CMOS Technology 3.3V 100Pin TQFP

XC95144XL-7TQG100I Datasheet PDF

Xilinx

CPLD XC9500 Family 3.2K Gates 144 Macro Cells 125MHz 0.35um, CMOS Technology 3.3V 100Pin TQFP

XC95144XL-7TQG100C0672 Datasheet PDF

Xilinx

CPLD XC9500 Family 3.2K Gates 144 Macro Cells 125MHz 0.35um Technology 3.3V 100Pin TQFP

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