Web Analytics
Part Datasheet Search > Flip Flops > HEF4027 Datasheet PDF
Images are for reference

HEF4027 Datasheet PDF

Part Series:
HEF4027 Series
Category:
Flip Flops
Description:
4000B Series 3 to 15V Surface Mount Edge Triggered Dual Jk Flip-Flop - SOIC-16
Updated Time: 2023/09/27 08:44:07 (UTC + 8)

HEF4027 Datasheet PDF Flip Flops

15 Pages
Nexperia
Flip Flop JK-Master-Slave Type Pos-Edge 2Element 16Pin PDIP
14 Pages
Nexperia
IC JK TYPE POS TRG DUAL 16SOIC
14 Pages
Nexperia
IC JK TYPE POS TRG DUAL 16SOIC
14 Pages
NXP
IC 4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, 3.9MM, PLASTIC, MS-012, SOT109-1, SOP-16, FF/Latch
14 Pages
NXP
NXP HEF4027BP, Dual, J-K Type Flip Flop, 3 → 15V, 16Pin DIP
14 Pages
Philips
HEF4027BT
13 Pages
Nexperia
Flip Flop JK-Master-Slave Type Pos-Edge 2Element 16Pin SO

HEF4027BT,653 - NXP Specifications

TYPE
DESCRIPTION
Mounting Style
Surface Mount
Frequency
30 MHz
Number of Pins
16 Pin
Supply Voltage (DC)
4.50V (min)
Case/Package
SOIC-16
show more

HEF4027BT,653 - NXP Function Overview

The HEF4027BT is a dual JK Flip-flop features independent set-direct (SD), clear-direct (CD), clock inputs and outputs (Q, Q\\). Data is accepted when clock is low and transferred to the output on the positive-going edge of the clock. The active high asynchronous clear-direct and set-direct inputs are independent and override the J, K and clock inputs. The outputs are buffered for best system performance. Schmitt trigger action makes the clock input highly tolerant of slower rise and fall times. It operates over a recommended VDD power supply range of 3 to 15V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS or another input.
Fully static operation
Standardized symmetrical output characteristics
Complies with JEDEC standard JESD 13-B
show more
Part Datasheet PDF Search
Loading...
72,405,303 Parts Datasheet PDF, Update more than 5,000 PDF files ervery day.

Relate Parts