HEF4027BP Datasheet PDF - NXP

●The HEF4027BP is an edge-triggered dual JK Flip-Flop features independent set-direct (SD), clear-direct (CD), clock (CP) inputs and outputs (Q, Q). Data is accepted when CP is low and transferred to the output on the positive-going edge of the clock. The active high asynchronous clear-direct (CD) and set-direct (SD) inputs are independent and override the J, K and CP inputs. The outputs are buffered for best system performance. Schmitt trigger action makes the clock input highly tolerant of slower rise and fall times.

● Fully static operation

● Standardized symmetrical output characteristics

● Complies with JEDEC standard JESD 13-B