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CD4071 Datasheet PDF

Part Series:

CD4071 Series

Category:

Logic Gates

Description:

OR Gate 4Element 2IN CMOS 14Pin SOIC T/R

Document:

CD4071BE Datasheet PDF (31 Pages)

Updated Time: 2023/01/13 01:32:32 (UTC + 8)

CD4071 Logic Gates Datasheet PDF

#1

CD4071BE

Datasheet PDF (31 Pages)

6.1

TI

#2

CD4071BM96

Datasheet PDF (31 Pages)

4.6

TI

#3

CD4071BM

Datasheet PDF (31 Pages)

4.3

TI

#4

CD4071BPWR

Datasheet PDF (31 Pages)

2.9

TI

CD4071 Datasheet PDF Logic Gates

31 Pages

TI

OR Gate 4Element 2IN CMOS 14Pin TSSOP Tube

31 Pages

TI

OR Gate 4Element 2IN CMOS 14Pin CDIP Tube

31 Pages

TI

OR Gate 4Element 2IN CMOS 14Pin SOP T/R

31 Pages

TI

OR Gate 4Element 2IN CMOS 14Pin SOIC T/R

31 Pages

TI

OR Gate 4Element 2IN CMOS 14Pin CDIP Tube

31 Pages

TI

OR Gate 4Element 2IN CMOS 14Pin TSSOP Tube

31 Pages

TI

OR Gate 4Element 2IN CMOS 14Pin PDIP Tube

31 Pages

TI

OR Gate 4Element 2IN CMOS 14Pin SOP T/R

31 Pages

Fairchild

OR Gate 4Element 2IN CMOS 14Pin PDIP Rail

31 Pages

Fairchild

OR Gate 4Element 2IN CMOS 14Pin SOIC N T/R

31 Pages

TI

OR Gate 4Element 2IN CMOS 14Pin TSSOP T/R

31 Pages

TI

OR Gate 4Element 2IN CMOS 14Pin SOIC Tube

31 Pages

Fairchild

OR Gate 4Element 2IN CMOS 14Pin SOIC N Rail

31 Pages

TI

OR Gate 4Element 2IN CMOS 14Pin SOIC T/R

30 Pages

TI

IC QUAD 2INPUT OR GATE 14-SOIC

30 Pages

TI

IC QUAD 2INPUT OR GATE 14-TSSOP

More CD4071 Datasheet PDF >

CD4071BM96 - TI Specifications

TYPE

DESCRIPTION

Mounting Style

Surface Mount

Number of Pins

14 Pin

Supply Voltage (DC)

3.00V ~ 18.0V

Case/Package

SOIC-14

Number of Outputs

1 Output

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CD4071BM96 - TI Function Overview

●CMOS OR Gates

●OR gates provide the system designer with direct implementation of the positive-logic OR

●function and supplement the existing family of CMOS gates.

●The CD4071B, CD4072B, and CD4075B types are supplied in 14-lead hermetic dual-in-line

●ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

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