LPC1343FHN33 Datasheet PDF - NXP

●The LPC1343FHN33 is a 32-bit Microcontroller based on ARM Cortex-M3 core with RISC architecture operates at a maximum frequency of 72MHz. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching. The device incorporates 32kB internal flash, 8kB internal RAM, 8-channel 10-bit A/D converter and 26 general-purpose I/O pins.

● ARM Cortex-M3 built-in nested vectored interrupt controller (NVIC)

● In-system programming (ISP) and In-application programming (IAP)

● Selectable boot-up - UART or USB

● USB MSC and HID on-chip drivers

● USB 2.0 Full-speed device controller with on-chip PHY for device

● UART with fractional baud rate generation, modem, internal FIFO and RS-485/EIA-485 support

● SSP controller with FIFO and multi-protocol capabilities

● Four general purpose counter/timers

● Programmable watchdog timer (WDT)

● System tick timer

● Serial wire debug and serial wire trace port

● High-current output driver (20mA) on one pin

● High-current sink drivers (20mA) on two I2C-bus pins in fast-mode Plus

● Integrated PMU (power management unit)

● Three reduced power modes - sleep, deep-sleep and deep power-down

● GPIO pins can be used as edge and level sensitive interrupt sources

● Clock output function with divide

● Processor wake-up from deep-sleep mode

● Brownout detect with four separate thresholds

● Power-on reset (POR)