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SN74HC74 Datasheet PDF

Part Series:
SN74HC74 Series
Category:
-
Description:
Dual D-Type Positive-Edge-Triggered Flip-Flops With Clear and Preset
Updated Time: 2023/01/13 02:31:59 (UTC + 8)

SN74HC74 Datasheet PDF -

33 Pages
TI
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* Wide Operating Voltage Range of 2V to 6V * Outputs Can Drive Up To 10 LSTTL Loads * Low Power Consumption, 40μA Max ICC * Typical tpd = 15ns * ±4mA Output Drive at 5V * Low Input Current of 1µA Max
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SN74HC74 - TI Specifications

TYPE
DESCRIPTION
Case/Package
SO-14
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SN74HC74 - TI Function Overview

The SNx4HC74 devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
Wide Operating Voltage Range: 2 V to 6 V
Outputs Can Drive Up To 10 LSTTL Loads
Low Power Consumption, 40-µA Maximum ICC
Typical tpd = 15 ns
±4-mA Output Drive at 5 V
Very Low Input Current of 1 µA
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