Web Analytics
Part Datasheet Search > Logic ICs > 74HC74 Datasheet PDF
Images are for reference

74HC74 Datasheet PDF

Part Series:
74HC74 Series
Category:
Logic ICs
Description:
IC D-TYPE POS TRG DUAL 14SOIC
Updated Time: 2023/01/13 01:22:11 (UTC + 8)

74HC74 Datasheet PDF Logic ICs

22 Pages
Nexperia
IC D-TYPE POS TRG DUAL 14TSSOP
22 Pages
NXP
Flip Flop D-Type Pos-Edge 2Element 14Pin TSSOP T/R
22 Pages
NXP
NXP 74HC74D,652 Flip-Flop, Complementary, Positive Edge, 74HC74, D, 16ns, 76MHz, 25mA, SOIC
22 Pages
Nexperia
IC D-TYPE POS TRG DUAL 14SOIC
22 Pages
NXP
Flip Flop D-Type Pos-Edge 2Element 14Pin TSSOP Bulk
22 Pages
NXP
Flip Flop D-Type Pos-Edge 2Element 14Pin DHVQFN EP T/R
22 Pages
NXP
Flip Flop D-Type Pos-Edge 2Element 14Pin PDIP Bulk
22 Pages
NXP
74HC Series 6V Dual D-Type Flip-Flop with Set and Reset - SSOP-14
21 Pages
Nexperia
IC: digital; D flip-flop; Channels:2; SMD; SO14; Series: HC
21 Pages
NXP
Flip Flop D-Type Pos-Edge 2Element 14Pin TSSOP Tube
21 Pages
Nexperia
IC D-TYPE POS TRG DUAL 14DHVQFN
21 Pages
NXP
Flip Flop D-Type Pos-Edge 2Element 14Pin TSSOP T/R
20 Pages
ON Semiconductor
Flip Flop D-Type Pos-Edge 2Element 14Pin TSSOP T/R
20 Pages
Nexperia
IC D-TYPE POS TRG DUAL 14TSSOP
20 Pages
Nexperia
IC D-TYPE POS TRG DUAL 14SOIC
9 Pages
ON Semiconductor
Flip Flop D-Type Pos-Edge 2Element 14Pin SOIC N Rail

74HC74D,653 - Nexperia Specifications

TYPE
DESCRIPTION
Mounting Style
Surface Mount
Frequency
82 MHz
Number of Pins
14 Pin
Case/Package
SOIC-14
Number of Outputs
1 Output
show more

74HC74D,653 - Nexperia Function Overview

The 74HC74D is a dual positive edge triggered D-type Flip-flop has individual data (nD), clock (nCP), set (nSD\\) and reset (nRD\\) inputs and complementary nQ and nQ outputs. Data at the nD-input, that meets the set-up and hold time requirements on the low-to-high clock transition, is stored in the flip-flop and appears at the nQ output. Schmitt-trigger action in the clock input, makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Symmetrical output impedance
Low power dissipation
High noise immunity
Balanced propagation delays
CMOS Input levels
Complies with JEDEC standard No. 7A
show more
Part Datasheet PDF Search
Loading...
72,405,303 Parts Datasheet PDF, Update more than 5,000 PDF files ervery day.

Relate Parts